ISTESNE International Symposium on Technology Evolution for Silicon Nano-Electronics

June 3Thur. → 5Sat. 2010

Tokyo Tech. Front (Kuramae kaikan), Tokyo Institute of Technology, Tokyo, JAPAN

Sponsored by Scientific Research on Priority Areas (No. 18063012, “Post-scaling”) from the Ministry of Education, Culture, Sports, Science and Technology in Japan

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Call for Paper

The Organizing Committee invites you to the conference and welcomes the submission of your papers for oral and poster presentation. The conference will consist of both invited and contributed papers, which are solicited in the following scope.

• - Nano-scale complementary metal-oxide-semiconductor devices (Nano-CMOS)
• - Novel functional devices, materials, and nanoprocess technologies
• - Nano-bio physics and technologies for future nano devices
• - Variability control technologies
• - Signal integrity

SUBMISSION OF ABSTRACTS
(Deadline : April 15, 2010 (Extended from March 31, 2010))

The camera-ready one-page abstract including figures (A4 size; 2 cm margin on four sides, use of Times New Roman Font and Single Spacing is recommended) should be submitted as a PDF-file via web site. The abstract text (in normal 12-point font) should be headed by the Title (in bold 14-point), Author(s), Affiliation(s), and E-mail address (in normal 12-point). Please indicate the key words, when submitting the abstract via web site. The notice of acceptance will be sent to the corresponding author by the beginning of April 2010.

Abstract template (MS-word file)

Proceedings

After peer-reviewing manuscript presented at this symposium will be published in a special issue of an academic journal. The online submission forms will be available by the end of April, 2010.